1. Technical Field
The present invention relates to semiconductor devices and in particular to a method for manufacturing a semiconductor device having transistors with different drive voltages and/or gate breakdown voltages in a common semiconductor layer.
2. Related Art
As weight-reduction and miniaturization of portable electronic devices have progressed in recent years, research and development to further reduce the size of integrated circuits (ICs) to be mounted on these electronic devices are being conducted. Such technologies include methods that reduce chip areas of ICs through mix-mounting transistors for low voltage operation and high breakdown voltage transistors for high voltage operations on the same substrate (the same chip).
In these instances, a LOCOS method, a semi-recess LOCOS method and a trench element isolation method may be available as methods for isolating elements. In view of reducing the chip areas of ICs, the use of a trench element isolation method may be more preferable than the use of a LOCOS method or a semi-recess LOCOS method.
It is noted that, since high breakdown voltage transistors have deep diffusion layers, heat treatment at a high temperature is necessary to form the diffusion layers. Element isolation regions that are formed by a trench element isolation method are rather weak against heat and stress caused by heat, and are prone to have deformities and defects, compared to element isolation regions formed by a LOCOS method or a semi-recess LOCOS method. For this reason, a LOCOS method or a semi-recess LOCOS method is most commonly used as a method for isolating elements when low voltage driving transistors and high breakdown voltage transistors are mounted together.
It is an object of the present invention to provide a method for manufacturing a semiconductor device having transistors with different gate breakdown voltages and/or drain breakdown voltages in a common semiconductor layer.